VoltSpot

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Announcing version 2.0!

Version 2.0 extends VoltSpot's modeling capability to cover 3D-ICs. In both steady-state and transient simulations, v2.0 supports the traditional TSV-based 3D PDN as well as a novel voltage-stacking (V-S) power-delivery structure. You can download version 2.0 here.

What is VoltSpot?

VoltSpot is a pre-RTL power delivery network (PDN) model for architecture-level PDN noise and reliability evaluation. With a fine-grained, grid-based on-chip model, VoltSpot is capable of capturing the relationship between PDN design details (e.g., C4 pad count and placement, metal layer geometry, on-chip decoupling capacitor distribution, etc.) and supply-voltage noise. It is implemented in ANSI C and can be integrated with most power-performance simulators like McPAT and Gem5. VoltSpot contributes to a versatile platform for investigating the spatial and temporal locality of supply voltage noise, evaluating design- and run-time noise mitigation techniques, and estimating vulnerability to lifetime-reliability problems such as electromigration (EM). This architecture level model has been validated against circuit level SPICE models.

Publications

More information and experiments are available in our tech report here or recent paper:

Runjie Zhang, Ke Wang, Brett H. Meyer, Mircea R. Stan, and Kevin Skadron. “Architecture Implications of Pads as a Scarce Resource.” The 41st International Symposium on Computer Architecture (ISCA) . June 2014.

Runjie Zhang, Kaushik Mazumdar, Brett H. Meyer, Ke Wang, Kevin Skadron, and Mircea R. Stan. “A Cross-Layer Design Exploration of Charge-Recycled Power-Delivery in Many-Layer 3D-IC.” The 52st Design Automation Conference (DAC) . June 2015.

Runjie Zhang, Kaushik Mazumdar, Brett H. Meyer, Ke Wang, Kevin Skadron, and Mircea R. Stan. “Transient Voltage Noise in Charge-Recycled Power Delivery Networks for Many-Layer 3D-IC.” International Symposium on Low Power Electronics and Design (ISLPED) . July 2015.

This work was supported in part by the US National Science Foundation (NSF) under grants CNS-0916908 and MCDA-0903471 and by the Defense Advanced Research Projects Agency (DARPA) Microsystems Technology Office (MTO) under contract no. HR0011-13-C-0022. Any opinions, findings, conclusions, or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the sponsoring agencies.

Last updated: July. 25, 2015

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