Documentation
User Guide: Information on how to install and use HotSpot can be obtained from this
HotSpot-HOWTO. Please also see the FAQ, and check the archives of the mailing list. If these do not answer your questions, please post a question on the list, and we will try to respond within 2 business days.
Other publications related to HotSpot are listed below:
Improvements in version 6.0 are described here:
- R. Zhang, M. R. Stan, and K. Skadron, "HotSpot 6.0: Validation, Acceleration and Extension." University of Virginia, Tech. Report CS-2015-04
(pdf).
Importance of modeling secondary heat transfer path (available in HotSpot 5.0) in special cooling solution is described here:
- W. Huang, K. Skadron, S. Gurumurthi, R. J. Ribando, and M. R. Stan. " Differentiating the Roles of IR Measurement and Simulation for Power and Temperature-Aware Design." In Proceedings of the 2009 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). Apr. 2009.
(pdf).
Improvements in version 4.0 are described here:
- W. Huang, K. Sankaranarayanan, R. J. Ribando, M. R. Stan, and K. Skadron.
“Accurate, Pre-RTL Temperature-Aware Processor Design Using a Parameterized, Geometric Thermal Model”
IEEE Transactions on Computers, 57(9):1277-88, Sept. 2008, DOI 10.1109/TC.2008.64.
(pdf).
Greg Link's HS3d tool, from which v3.1 borrows its
math acceleration engine, is described here:
- Link, G. M. and Vijaykrishnan, N. “Thermal
Trends in Emergent Technologies.” In Proceedings of the International Symposium on Quality Electronic
Design (ISQED), March 2006. (link)
HotFloorplan, which is a part of HotSpot 3.0, is described here:
- K. Sankaranarayanan, S. Velusamy, M.R. Stan, and K. Skadron.
"A Case for Thermal-Aware Floorplanning at the Microarchitectural Level."
To appear in The Journal of Instruction-Level
Parallelism, Sept. 2005. (pdf)
Validation against a thermal test chip and against an FPGA are described here:
- S. Velusamy, W. Huang, J. Lach, M. R. Stan, and K. Skadron. “Monitoring
Temperature in FPGA based SoCs.” In Proceedings of the IEEE International
Conference on Computer Design (ICCD), Oct. 2005. (pdf)
-
S. Velusamy, W. Huang, J. Lach,
and K. Skadron. “Monitoring Temperature in FPGA based SoCs.” Tech Report
CS-2004-39, Univ. of Virginia Dept. of Computer Science, Dec. 2004.
-
W. Huang, M. R. Stan, K. Skadron, K. Sankaranarayanan, S. Ghosh,
and S. Velusamy. "Compact Thermal Modeling for Temperature-Aware
Design." In Proceedings of the
41st Design Automation Conference, June 2004. (pdf)
Improvements
embodied in version 2.0 are described here:
- W. Huang, M. R. Stan, K. Skadron, K. Sankaranarayanan, S. Ghosh,
and S. Velusamy. "Compact Thermal Modeling for Temperature-Aware
Design." In Proceedings of the
41st Design Automation Conference, June 2004. (pdf)
The following paper gives a concise introduction to the temperature
model.
It also explains the various exploratory experiments that we did.
- K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K.
Sankaranarayanan, and D. Tarjan.
“Temperature-Aware Microarchitecture.” In Proceedings of the
30th
International Symposium on Computer Architecture, pp. 2-13, June 2003. (postscript
|
pdf
|
Abstract)
Powerpoint
slides (as PDF) from our ISCA presentation are also available.
This paper was awarded
the Bob Rau
memorial award for best student paper!
More detailed information on the model and experiments are available in
subsequent journal papers:
-
W. Huang, S. Ghosh, K.
Sankaranarayanan, K. Skadron, and M. R. Stan. “HotSpot: Thermal Modeling for
CMOS VLSI Systems.” IEEE Transactions on Component Packaging and
Manufacturing Technology. 2005, (pdf)
-
K. Skadron, K. Sankaranarayanan,
S. Velusamy, D. Tarjan, M.R. Stan, and W. Huang. “Temperature-Aware
Microarchitecture: Modeling and Implementation.” ACM Transactions on
Architecture and Code Optimization, 1(1):94-125, Mar. 2004.
(pdf)
Other papers describing the early versions of the HotSpot model and
our recent work using HotSpot can be found here.