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HotLeakage Simulator Pre-Release Version 1.0.


README.HotLeakage is for HotLeakage Pre-Release 1.0. It is a tool for  
modeling leakage current for cache-like structures. It is built upon 
Wattch Power Performance simulator. 

Currently it is implemented to model the leakage of caches and register 
file only. Though adding models for other cache-like structures is very 
simple. It models both sub-threshold and gated leakage. This model also 
takes care of the inter-die variations in different parameters like voltage, 
technology etc. 
HotLeakage 1.0 can be downloaded from:
We have merged the HotLeakage list into the HotSpot list.  This e-mail list is 
for the exchange of comments, questions, and answers among users regarding
the HotLeakage or HotSpot models. The HotLeakage authors will try to monitor this
list and respond to questions as quickly as possible.
One can subscribe at:


*The technical report describes in details the derivation of the model 
and the tool in general.
*README.HotLeakage is the general README.
*README.HotLeakage.Howto.FAQ is the document that describes how to use 
the tool and how to use it to model another structure etc. 
*README.HotLeakage.TODO is the list of things to be done for the final 
*README_Hotleakage_Model.doc describes the circuit simulations one needs to 
do for adding another structure or modeling for a different technology.

HotLeakage should compile on any system that SimpleScalar compiles on. 
Testing/development was primarily done with the ALPHA version.
It was verified that the tool should compile on both PISA and ALPHA but
otherwise no testing has been done with PISA.  We already know of one change
that should be made when using PISA:
Comment out the line in main.c: "sim_num_insn -= 2000000000;"
and uncomment the line         "//sim_num_insn -= fastfwd_count;"

It should be straightforward to modify HotLeakage into a completely
modular form such that any simulator infrastructure can use it. 
Note that HotLeakage is primarily designed to 
be used with sim-outorder (the full processor simulator).  It does not 
support sim-fast, sim-cache, etc (although adding some simple power 
estimates for these faster simulators would be very easy).  Thus you 
should only need to run "make sim-outorder" and in fact you will get 
errors if you try to compile the other simulators because they are 
missing some external variable declarations.
For correct compilation on any systems please follow the following steps:
1. gmake symlinks
2. gmake config-<alpha/pisa>
3. gmake clean
4. gmake
Both gmake and make should work. Please note the first step which is different
from the normal SimpleScalar compilation.


Running HotLeakage should be just like running sim-outorder.  Provide it
with your processor configuration parameters, input binary, and input
data set. There are lots of separate processor configuration parameters for 
leakage modeling. Please see the hotleak_alpha_config.cfg file for 
more details. Please NOTE that currently the Technology parameter needs 
not only be provided in the command line but also needs to be hardcoded 
in powerinit.c ( in the function power_reg_options).This will be fixed 
in the final release.

These are the additional statistics that are generated by HotLeakage:
In the beginning of the simulation all the leakage currents are 
calculated (Currently only the register file and the caches).
The leakage currents for each component (for e.g. for a cache, the 
data array, tag-array, decoders etc ) are printed.
In the code (leakage.c) look out for leakage_power->dl1_data etc. for 
the data structures that store these values.


This version has some cache leakage saving techniques (like drowsy , 
gatedVss) being modeled for the caches. The user has the option to 
choose any or none of these techniques.
Additional leakage saving mechanisms can be modeled and the HotLeakage 
leakage model can be used.
Some highlights of the major changes from the basic Wattch 1.0 release.
1). Leakage.c and leakage.h 
These files contain the core of HotLeakage leakage model.
double nmos_ileakage(double aspect_ratio, double Volt, double Vth0, 
double Tkelvin, double tox0)
double pmos_ileakage(double aspect_ratio, double Volt, double Vth0, 
double Tkelvin, double tox0)
These two above functions are the main functions that calculate the 
leakage of one P and N transistor.
Depending on the circuit one can call these to calculate the leakage 
of one cell of a structure.
Here there are five main parameters that a user can vary to model 
different scenarios.
*Aspect Ratio.
*Threshold Voltage.
*Toxide Thickness.
2). Leakinit.c
This module initializes all the technology parameters for different 
If the user wants to calculate the leakage of a different structure 
he or she will have to do the circuit simulations as mentioned in the 
README__HotLeakage_Model.doc and then feed the parameters in this module.
3). Power.c and powerinit.c and power.h
Power.c is mainly the same. Power.h has been broken for ease of usage 
into powerinit.c and power.h
Cacti libraries (in cacti subdirectory):
This is the Cacti distribution.  It is used in power.c to perform
automatic delay-optimial cache partitioning.  Some of the low-level
routines to compute gate/diffusion capacitance of transistors are also
shared. Leakage.c also uses it for for the leakage calculation of caches.
4). Cache.c  
This is modified to model different cache leakage saving mechanisms.
If you use none then you should not be concerned about it.
5). Cache_leak_ctrl.c and cache_leak_ctrl.h
Again these files are for the different cache leakage saving mechanisms. 
Please see the TODO list for the things to be added in the final release.
Please send your comments and any bugs to: 
We are continually trying to improve it to release it in its final form.


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