HotSpot

Documentation

Improvements in version 4.0 are described here:

W. Huang, K. Sankaranarayanan, R. J. Ribando, M. R. Stan, and K. Skadron. “An Improved Block-Based Thermal Model in HotSpot-4.0 with Granularity Considerations.” In Proceedings of the Workshop on Duplicating, Deconstructing, and Debunking, in conjunction with the 34th International Symposium on Computer Architecture (ISCA), June 2007 (pdf). Extended discussion and results can be found in this technical report.

Greg Link's HS3d tool, from which v3.1 borrows its math acceleration engine, is described here:

Link, G. M. and Vijaykrishnan, N. “Thermal Trends in Emergent Technologies.” In Proceedings of the International Symposium on Quality Electronic Design (ISQED), March 2006. (link)

HotFloorplan, which is a part of HotSpot 3.0, is described here:

K. Sankaranarayanan, S. Velusamy, M.R. Stan, and K. Skadron. "A Case for Thermal-Aware Floorplanning at the Microarchitectural Level." To appear in The Journal of Instruction-Level Parallelism, Sept. 2005. (pdf)

Validation against a thermal test chip and against an FPGA are described here:

S. Velusamy, W. Huang, J. Lach, M. R. Stan, and K. Skadron. “Monitoring Temperature in FPGA based SoCs.” In Proceedings of the IEEE International Conference on Computer Design (ICCD), Oct. 2005. (pdf)
S. Velusamy, W. Huang, J. Lach, and K. Skadron. “Monitoring Temperature in FPGA based SoCs.” Tech Report CS-2004-39, Univ. of Virginia Dept. of Computer Science, Dec. 2004.
W. Huang, M. R. Stan, K. Skadron, K. Sankaranarayanan, S. Ghosh, and S. Velusamy. "Compact Thermal Modeling for Temperature-Aware Design." In Proceedings of the 41st Design Automation Conference, June 2004. (pdf)

Improvements embodied in version 2.0 are described here:

W. Huang, M. R. Stan, K. Skadron, K. Sankaranarayanan, S. Ghosh, and S. Velusamy. "Compact Thermal Modeling for Temperature-Aware Design." In Proceedings of the 41st Design Automation Conference, June 2004. (pdf)

The following paper gives a concise introduction to the temperature model. It also explains the various exploratory experiments that we did.

K. Skadron, M. R. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan, and D. Tarjan. “Temperature-Aware Microarchitecture.” In Proceedings of the 30th International Symposium on Computer Architecture, pp. 2-13, June 2003. (postscript | pdf | Abstract)
Powerpoint slides (as PDF) from our ISCA presentation are also available.
This paper was awarded the Bob Rau memorial award for best student paper!

More detailed information on the model and experiments are available in subsequent journal papers:

W. Huang, S. Ghosh, K. Sankaranarayanan, K. Skadron, and M. R. Stan. “HotSpot: Thermal Modeling for CMOS VLSI Systems.” IEEE Transactions on Component Packaging and Manufacturing Technology. 2005, to appear. (preprint pdf)
K. Skadron, K. Sankaranarayanan, S. Velusamy, D. Tarjan, M.R. Stan, and W. Huang. “Temperature-Aware Microarchitecture: Modeling and Implementation.” ACM Transactions on Architecture and Code Optimization, 1(1):94-125, Mar. 2004. (pdf)

Information on how to install and use HotSpot can be obtained from this HotSpot-HOWTO. The HOWTO file for the older versions 1.0 and 2.0 can be found here.

Other papers describing the early versions of the HotSpot model and our recent work using HotSpot can be found here.

This material is based upon work supported by the National Science Foundation under grant nos. CCR-0133634, CCR-0105626, EIA-0224434, CCF-0429765, CNS-0509245, and CNS-0551630, the Army Research Office under grant no. W911NF-04-1-0288, and grants from IBM, Intel, and the Univ. of Virginia Fund for Excellence in Science and Engineering. Any opinions, findings, conclusions, or recommendations expressed in this material are those of the authors and do not necessarily reflect the views of the sponsoring agencies.

Last updated: 11 Apr. 2008

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