| Version History
- CHANGES IN VERSION 6.0
This release provides a new steady-state solver for the grid mode.
This solver is based on SuperLU, and provides 2-20x speedup over the prior iterative solver.
By integrating an extension developed by Prof. Ayse K. Coskun's research team at Boston University,
HotSpot now supports layers with non-uniform thermal resistivity and heat capacity. This feature can be
used to model regular/thermal TSVs.
Also in this release, we improved the support for the secondary heat transfer path. Now it is compatible
with 3D system.
Starting from vesrion 6.0, we discontinue the support for MS EXCEL interface.
- CHANGES IN VERSION 5.02
The RK4 bugfix in the previous release introduced another bug,
which is fixed in this release. Thanks to Ivan Ukhov for identifying it.
Other minor bugfixes including compiler warnings.
- CHANGES IN VERSION 5.01
This release fixes a bug in the adaptive step size calculation of
the numerical integration routine (RK4) that could result in an
error when HotSpot's default transient temperature functions are
modified (for e.g. to start with a much larger step size or to target
a much higher thermal precision than the default 0.01 C). Thanks to
Nima Aghaee for
identifying the bug and outlining the approach for a fix.
Also in this release, we fixed a bug in temperature_grid.c
- CHANGES IN VERSION 5.0
A parameterized heatsink and fan model. This feature is optinal.
There are several newly added files: package.c, package.h and
package.config. Commandline option '-package_model_used 1'
activates this new feature.
The option '-package_config_file ' allows users to use
their own package configuration file (format must comply to the
Modeling secondary heat transfer path. Package layers along the
secondary heat tranfer path are included in this release (on-chip
metal layers as a whole, C4 pads, package substrate, solder balls,
and printed-circuit board). In most cases, secondary heat transfer
path can be neglected. However, in special cases such as oil flow
over bare silicon die, the secondary heat transfer path plays an
important role and should be modeled (e.g. see our ISPASS'09paper).
To enable this feature, add '-model_secondary 1' in commandline
or in hotspot.config.
Leakage and temperature interactions. A simple leakage model
interface that allows users to simulatethe temperature-leakage
interaction. This feature can be enabled by adding '-leakage_used 1'
in commandline or hotspot.config. Users can use their own leakage
model to replace what is inside calc_leakage() in temperature.c.
This feature is only supported in steady-state temperature calculations.
Transient thermal-leakage loop is NOT supported, because the time
scales of transient leakage power evolvement are not clear, and it
is potentially wrong to assume instantaneous leakage update with
increased temperature in each transient step ("sampling interval")
Thermal properties of heasink, speader and thermal interface material
are now configurable in 'hotspot.config', as opposed to being hard
coded in'temperature.h' in earlier releases.
Transient thermal time constant fitting factor is changed from 0.5
to 0.333, for more accurate transient simulations. 0.5 was derived
based on traditional Elmore Delay model, which is not fully accurate
for thermal RC circuit. Our detailed analytical derivation reveals
that a factor of 1/3 is the right factor for lumped vs. distributed
thermal RC circuits.
A sample hotspot.exe is included in companion with the MS Excel
interface (HotSpotUI-5.0.xls), for users who prefer not doing the
Windows compilation. If this .exe file doesn't work in your Windows
system, follow instructions in HOWTO fileto compile HotSpot under
- CHANGES IN VERSION 4.2
An MS Excel 2003 interface to HotSpot ("hotspotUI.xls") that lets
users input the floorplan and power trace values through an Excel
spreadsheet. The HotSpot simulator can then be run from the
spreadsheet itself. The floorplan and the steady-state thermal map
are displayed within Excel. The temperature trace numbers are also
output to the Excel spreadsheet.
Compilation support under Windows/VC++ through a new "Makefile.VC"
Other minor changes like support for higher number of functional
blocks, improved printing of floorplan statistics etc.
- CHANGES IN VERSION 4.1
The steady-state solver of the grid model has been upgraded from
a Gauss-Seidel solver to a multigrid solver. This results in typical
steady-state computation speedups > 20x. In order to facilitate the
multigrid implementation, now the grid dimensions are required to be
a power of two. Hence, the default grid size has been modified from
50x50 to 64x64.
The simulator template (sim-template.c) that illustrates the use
of HotSpot in a typical cycle-accurate simulator has been upgraded
to include grid model usage. Earlier it only demonstrated the use of
the block model (sim-template_block.c)
The 'Makefile' has been upgraded to wrap HotSpot into a library
(libhotspot.a) for easier integration with existing simulators.
A bug in 'hotspot.c' lead to erroneous power averaging in
modeling 3-D chips while using the grid model. This has been
fixed in this release.
A bug in the floorplan plotting script 'tofig.pl' caused
temporary files not to be deleted. It has been fixed now.
Other minor changes like fixing typos etc.
- CHANGES IN VERSION 4.0
- Accuracy Enhancements:
- Enhanced package modeling: removal of the forced isotherm
- Modeling of lateral heat flow in the TIM layer
- Block model: a wrapper script to sub-divide floorplan blocks
with high aspect ratio to improve accuracy
- Grid model: upgradation of the first order transient sover to
a fourth order adaptive step-size Runge-Kutta solver
- Grid model: an option to maintain grid thermal state across
calls to the transient solver
- Updated defaults:
The default package parameters have been updated to reflect
contemporary packages. The most significant of the changes are:
- Die thickness has been updated to 0.15 mm down from 0.5 mm.
(See: B. Majeed, I. Paul, K. M. Razeeb, J. Barton and S. C. O'Mathuna.
"Microstructural, Mechanical, Fractural and Electrical Characterization
of Thinned and Singulated Silicon Test Die". Journal of Micromechanics
and Microengineering, 16:1519-1529, Aug. 2006.)
- Tim thickness and resistivity have been updated respectively to 20u
down from 75u and 0.25 mK/W down from 0.75 mK/W. (See: E.C. Samson,
S.V. Machiroutu, J.-Y. Chang, I. Santos, J. Hermerding, A. Dani,
R. Prasher, and D.W.Song. "Interface Material Selection and a Thermal
Management Technique in Second-Generation Platforms Built on Intel
Centrino Mobile Technology." Intel Technology Journal, 9(1), Feb. 2005.)
- Complete re-write of the grid model for easy readability and extensibility.
- Minor bugfixes etc.
More detail can be found in the following paper:
W. Huang, K. Sankaranarayanan, R. J. Ribando, M. R. Stan, and K. Skadron.
“An Improved Block-Based Thermal Model in HotSpot-4.0 with Granularity Considerations.”
In Proceedings of the Workshop on Duplicating, Deconstructing, and Debunking, in conjunction
with the 34th International Symposium on Computer Architecture (ISCA), June 2007 (pdf).
Extended discussion and results can be found in this technical report.
- CHANGES IN VERSION 3.1
- Version 3.1 incorporates two major performance enhancements
into the block model of HotSpot. The first is a math acceleration engine
from Greg Link's
that replaces HotSpot's vector and matrix function calls with vendor-provided
BLAS and LAPACK math library calls. The second is the conversion of the
fixed step-size transient Runge-Kutta solver into an adaptive step-size
- CHANGES IN RELEASE 3.0.2
- Release 3.0.2 fixes a bug in the grid model of HotSpot 3.0
that lead to erroneous discrepancies between the block
and grid models.
- CHANGES IN RELEASE 3.0.1
- Release 3.0.1 fixes a few bugs in release 3.0, the most
important of them being the way the dead space around the
edge of the chip is modeled.
- This release provides a choice to the user for the
mapping between the grid and block temperatures of the
- CHANGES SINCE VERSION 2.0
- A new grid-based thermal model that is better suited for transient
thermal simulation of a large numbers of blocks, blocks of radically
different sizes, and study of temperature gradients within blocks.
- 3-D modeling. The grid model allows modeling for individual layers
within a die (device, metal, etc.) or stacked 3-D chips.
- HotFloorplan, an architecture-level floorplanning tool for pre-RTL
design studies. It uses the classic simulated annealing algorithm and
a thermal-aware objective function.
- Floorplan and thermal modeling of the dead space around the edge
of the die due to scribe lines.
- Implementation of previously proposed, first-order wire-delay
model for interconnects in the global and intermediate metal layers.
- A thermal visualization tool for the grid model that outputs the
processor's thermal map as a color image in the SVG format.
- Improved and hence significantly different interfaces including:
- Better command line support
- Better specification of parameters through a configuration file
- More modular code organization
- Switch to C++ compiler as parts of the grid model are in C++
- Improved documentation
More detail can be found in this paper:
- K. Sankaranarayanan, S. Velusamy, M.R. Stan, and K. Skadron.
"A Case for Thermal-Aware Floorplanning at the Microarchitectural Level."
To appear in The Journal of Instruction-Level
Parallelism, June 2005. Available in pdf
- DIFFERENCES BETWEEN VERSIONS 1.0 and 2.0
- Modifications from the previous version
- The demo "main" function in sim-template.c is now modified to
read in power trace files and output temperature trace files.
- The central heat spreader node, which was monolithic, is also
divided now into multiple blocks - just like the die.
- Bug fixes - 'getr' function and C_FACTOR modified.
- New in HotSpot 2.0
- A thermal model for the interface material between the die and
the heat spreader.
- Validation of the HotSpot model against an actual test-chip.
- New sample power trace input file - 'gcc.p' and temperature
trace output file 'gcc.t'.
More detail can be found in this paper:
- W. Huang, M. R. Stan, K. Skadron, K. Sankaranarayanan, S. Ghosh,
and S. Velusamy. "Compact Thermal Modeling for Temperature-Aware
Design." In Proceedings of the
41st Design Automation Conference, June 2004.
This material is based upon work supported by the National Science Foundation under grant nos. CCR-0133634, CCR-0105626, EIA-0224434, CCF-0429765, CNS-0509245, and CNS-0551630, the Army Research Office under grant no. W911NF-04-1-0288, and grants from
IBM, Intel, and the Univ. of Virginia Fund for Excellence in Science and Engineering. Any opinions, findings, conclusions, or recommendations expressed
in this material are those of the authors and do not necessarily reflect the
views of the sponsoring agencies.
Last updated: Jan. 23, 2019
| HPLP ]